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<h1 id="arm-vs-aarch64-vs-amd64-vs-x86_64-vs-x86">arm vs AArch64 vs amd64 vs x86_64 vs x86：有什么区别？<a class="headerlink" href="#arm-vs-aarch64-vs-amd64-vs-x86_64-vs-x86" title="Permanent link">&para;</a></h1>
<p><a class="glightbox" href="https://img.linux.net.cn/data/attachment/album/202309/25/092727ilaax5z7dexxhxop.jpg" data-type="image" data-width="auto" data-height="auto" data-desc-position="bottom"><img alt="" src="https://img.linux.net.cn/data/attachment/album/202309/25/092727ilaax5z7dexxhxop.jpg" /></a></p>
<blockquote>
<p>当涉及到 CPU 的时候，有许多术语：AArch64、x86_64、amd64、arm 等等。了解它们是什么以及它们之间的区别。</p>
</blockquote>
<p>当你查看数据表或软件下载页面时是否被 <code>ARM</code>、<code>AArch64</code>、<code>x86_64</code>、<code>i386</code> 等术语混淆？这些被称为 CPU 架构，我会帮你深入了解这个计算话题。</p>
<p>以下的表将为你总结每个字符串所代表的意义：</p>
<table>
<thead>
<tr>
<th>CPU 架构</th>
<th>描述</th>
</tr>
</thead>
<tbody>
<tr>
<td><strong><code>x86_64</code></strong> /<code>x86</code>/<code>amd64</code></td>
<td>64 位 AMD/英特尔 CPU 的别称</td>
</tr>
<tr>
<td><strong><code>AArch64</code></strong> /<code>arm64</code>/<code>ARMv8</code>/<code>ARMv9</code></td>
<td>64 位 ARM CPU 的别称</td>
</tr>
<tr>
<td><strong><code>i386</code></strong></td>
<td>32 位 AMD/英特尔 CPU</td>
</tr>
<tr>
<td><strong><code>AArch32</code></strong> /<code>arm</code>/<code>ARMv1</code> 到 <code>ARMv7</code></td>
<td>32 位 ARM CPU 的别称</td>
</tr>
<tr>
<td><strong><code>rv64gc</code></strong> /<code>rv64g</code></td>
<td>64 位 RISC-V CPU 的别称</td>
</tr>
<tr>
<td><strong><code>ppc64le</code></strong></td>
<td>64 位 PowerPC CPU，<strong>小端字节序存储</strong></td>
</tr>
</tbody>
</table>
<p>从左到右是使用该术语来描述 CPU 架构超过其右侧其他可选用术语的偏好。</p>
<p>从左到右是使用该术语描述 CPU 架构的优先级，使用左侧的而不是其右侧的其他可供选择的术语。</p>
<p>如果你像我一样是个极客，并想要更深入地解释，请继续阅读！</p>
<h3 id="cpu">概述：CPU 架构<a class="headerlink" href="#cpu" title="Permanent link">&para;</a></h3>
<p>通常来说，我之前列出的术语是描述 CPU 架构的。但严格讲，它们被计算机工程师视为 CPU 的 <ruby>指令集架构<rt>Instruction Set Architecture</rt></ruby>（ISA）。</p>
<p>CPU 的指令集架构定义了 CPU 如何解析二进制代码中的 1 和 0。</p>
<p>这些 CPU 的 ISA 有几个主要的类别：</p>
<ul>
<li>x86（AMD/英特尔）</li>
<li>ARM</li>
<li>RISC-V</li>
<li>PowerPC（IBM 仍在使用）</li>
</ul>
<p>当然，还有更多种类的 CPU ISA，比如 MIPS、SPARC、DEC Alpha 等等。但我列出的这些至今仍然被广泛使用（以某种形式）。</p>
<p>上述列出的 ISA 主要根据 <em>内存总线的宽度</em> 分为至少两个子集。内存总线的宽度指的是 CPU 和 RAM 一次能传输的位数。内存总线有很多种宽度，但最常见的是 32 位和 64 位。</p>
<blockquote>
<p>💡 32 位的 CPU ISA 要么是已经过时的历史产物，被留下来要么只是为了支持旧的系统，要么只运用在微控制器中。可以说，<strong>所有新的硬件都已经是 64 位的了</strong>，特别是那些面向消费者的硬件。</p>
</blockquote>
<h3 id="x86amd">x86（AMD/英特尔）<a class="headerlink" href="#x86amd" title="Permanent link">&para;</a></h3>
<p>x86 CPU 的指令集架构主要源于英特尔，因为英特尔是最初搭配 8085 微处理器创建了它。8085 微处理器的内存总线宽度为 16 位。而后来，AMD 加入了这个领域，并且一直紧随英特尔的步伐，直到 AMD 创建出了自己的超集 64 位架构，超过了英特尔。</p>
<p>x86 架构的子集如下：</p>
<ul>
<li><code>i386</code>：如果你拥有的是 2007 年之前的 CPU，那么这可能就是你的 CPU 架构。它是现在使用的 AMD/英特尔的 x86 架构的 32 位“版本”。</li>
<li><code>x86_64</code>/<code>x86</code>/<code>amd64</code>：这三个术语在不同的项目中可能会被交替使用。 但它们都是指 x86 AMD/英特尔架构的 64 位“版本”。无论如何，<code>x86_64</code> 这个字符串比 <code>x86</code> 和 <code>amd64</code> 使用得更广泛（也更受欢迎）。例如，FreeBSD 项目称 64 位的 x86 架构为 <code>amd64</code>，而 Linux 和 macOS 则称之为 <code>x86_64</code>。</li>
</ul>
<blockquote>
<p>💡 由于 AMD 在创造 64 位 ISA 上超越了英特尔，所以一些项目（比如 FreeBSD）把 x86 的 64 位版本称为 <code>amd64</code>。<strong>但更被广泛接受的术语还是 x86_64</strong>。</p>
</blockquote>
<p>对于 CPU ISA，“x86” 这个字符串是一种特殊的情况。你要知道，在从 32 位的 x86（<code>i386</code>）到 64 位的 x86（<code>x86_64</code>）的过渡过程中，CPU 制造商确保了 CPU 能够运行 32 位 <em>和</em> 64 位指令。所以，有时你可能会看到 <code>x86</code> 也被用来意指“这款产品只能运行在 64 位的计算机上，但如果该计算机能运行 32 位指令，那么你也可以在它上面运行 32 位的用户软件”。</p>
<p>这种 x86 的模糊性——也就是诸如能同时运行 32 位代码的 64 位处理器——其主要用于和存在于运行在 64 位处理器上的，但是允许用户运行 32 位软件的操作系统，Windows 就通过这种被称作“兼容模式”的特性运用了这种方式。</p>
<p>汇总一下，由 AMD 和 英特尔 设计的 CPU 有两种架构：32 位的（<code>i386</code>）和 64 位的（<code>x86_84</code>）。</p>
<h4 id="_1">其它的英特尔<a class="headerlink" href="#_1" title="Permanent link">&para;</a></h4>
<p><code>x86_64</code> ISA 实际上有几个子集。这些子集都是 64 位，但它们新添加了诸如 SIMD（<ruby>单指令多数据<rt>Single Instruction Multiple Data</rt></ruby>）指令等功能。</p>
<ul>
<li><code>x86_64-v1</code>：这是大多数人都熟知的基础 <code>x86_64</code> ISA。当人们谈论 <code>x86_64</code> 时，他们通常指的就是 <code>x86_64-v1</code> ISA。</li>
<li><code>x86_64-v2</code>：此版本新增了更多如 SSE3（<ruby>流式 SIMD 扩展版本 3<rt>Streaming SIMD Extensions 3</rt></ruby>）之类的指令扩展。</li>
<li><code>x86_64-v3</code>：除了基础指令外，还新增了像 AVX（<ruby>高级矢量扩展<rt>Advance Vector eXtensions</rt></ruby>）和 AVX2 等指令。这些指令可以**使用高达 256 位宽的 CPU 寄存器**！如果你能够有效利用它们，就能大规模并行处理计算任务。</li>
<li><code>x86_64-v4</code>：这个版本在 <code>x86_64-v3</code> ISA 的基础上，迭代了更多的 SIMD 指令扩展，比如 AVX256 和 AVX512。其中，AVX512 可以**使用高达 512 位宽的 CPU 寄存器**！</li>
</ul>
<h3 id="arm">ARM<a class="headerlink" href="#arm" title="Permanent link">&para;</a></h3>
<p>ARM 不仅是一家为 CPU ISA 制定规范的公司，它也设计并授权给其他厂商使用其 CPU 内核，甚至允许其他公司使用 ARM CPU ISA 设计自己的 CPU 内核。（最后那句话听起来就像是个 SQL 查询似的！）</p>
<p>你可能因为如树莓派这类的 <ruby>单板计算机<rt>Single Board Computer</rt></ruby>）（SBC）听说过 ARM。但其实 ARM 的 CPU 还广泛应用于手机中。最近，苹果从使用 <code>x86_64</code> 处理器转向了在其笔记本和台式机产品中使用自家设计的 ARM 处理器。</p>
<p>就像任一种 CPU 架构一样，ARM 基于内存总线宽度也有两个子集。</p>
<p>官方认定的 32 位和 64 位 ARM 架构的名称分别是 <code>AArch32</code> 和 <code>AArch64</code>。这里的 <code>AArch</code> 字符串代表 “<ruby>Arm 架构<rt>Arm Architecture</rt></ruby>”。这些是 CPU 执行指令时可切换的**模式**。</p>
<p>实际符合 ARM 的 CPU ISA 的指令规范被命名为 <code>ARMvX</code>，其中 <code>X</code> 是规范版本的代表数字。目前为止，已经有九个主要的规范版本。规范 <code>ARMv1</code> 到 <code>ARMv7</code> 定义了适用于 32 位 CPU 的架构，而 <code>ARMv8</code> 和 <code>ARMv9</code> 是适用于 64 位 ARM CPU 的规范。（<a href="https://en.wikipedia.org/wiki/ARM_architecture_family#Cores">更多信息在此</a>）</p>
<blockquote>
<p>💡 每个 ARM CPU 规范又有进一步的子规范。例如 ARMv8，我们有 ARMv8-R、ARMv8-A、ARMv8.1-A、ARMv8.2-A、ARMv8.3-A、ARMv8.4-A、ARMv8.5-A、ARMv8.6-A、ARMv8.7-A、ARMv8.8-A 和 ARMv8.9-A。 其中 -A 表示“应用核心”，-R 表示“实时核心”。</p>
</blockquote>
<p>你可能会觉得困惑，为什么在 <code>AArch64</code> 正式被 ARM 认定为 64 位 ARM 架构后，有些人仍然称其为 <code>arm64</code>。原因主要有两点：</p>
<ol>
<li><code>arm64</code> 这个名称在 ARM 决定采用 <code>AArch64</code> 之前就已经广为人知了。（ARM 的一些官方文档也将 64 位的 ARM 架构称为 <code>arm64</code>…… 😬）</li>
<li><a href="https://lore.kernel.org/lkml/CA+55aFxL6uEre-c=JrhPfts=7BGmhb2Js1c2ZGkTH8F=+rEWDg@mail.gmail.com/">Linus Torvalds 对 <code>AArch64</code> 这个名称表示不满。</a> 因此，Linux 的代码库主要将 <code>AArch64</code> 称为 <code>arm64</code>。然而，当你在系统中运行 <code>uname -m</code> 时，输出仍然是 <code>aarch64</code>。</li>
</ol>
<p>因此，对于 32 位 ARM CPU，你应该寻找 <code>AArch32</code> 这个字符串，但有时也可能是 <code>arm</code> 或 <code>armv7</code>。相似的，对于 64 位 ARM CPU，你应该找 <code>AArch64</code> 这个字符串，但有时也可能会是 <code>arm64</code>、<code>ARMv8</code> 或 <code>ARMv9</code>。</p>
<h3 id="risc-v">RISC-V<a class="headerlink" href="#risc-v" title="Permanent link">&para;</a></h3>
<p>RISC-V 是 CPU 指令集架构（ISA）的一个开源规范。**但这并不意味着 CPU 自身是开源的！**这有点像以太网的情况。以太网规范是开源的，但你需付费购买网线、路由器和交换器。同样，RISC-V CPU 也要花钱购买。 :)</p>
<p>尽管如此，这并没有阻止人们创建并在开源许可下提供免费获取（<strong>设计上的获取</strong>，并非物理核心/SoC）的 RISC-V 核心。<a href="https://github.com/openhwgroup">这是其中的一项尝试</a>。</p>
<blockquote>
<p>💡 总结一下：如果你在寻找运行于 RISC-V 消费级 CPU 上的软件，你应该寻找 “<strong>rv64gc</strong>” 这一字符串。这是许多 Linux 发行版所公认的。</p>
</blockquote>
<p>像所有 CPU 架构一样，RISC-V 拥有 32 位和 64 位 CPU 架构。但由于 RISC-V 是非常新的描述 CPU ISA 的方式，大部分主流消费端或客户端的 CPU 核心一般都是 64 位的。大部分 32 位的设计都是微控制器，用于非常具体的用例。</p>
<p>它们的区别在于 CPU 的扩展。被称为 RISC-V CPU 的最低要求即实现“<ruby>基本整数指令集<rt>Base Integer Instruction Set</rt></ruby>”（<code>rv64i</code>）。</p>
<p>下表列出了一些扩展及其描述：</p>
<table>
<thead>
<tr>
<th>扩展名称</th>
<th>描述</th>
</tr>
</thead>
<tbody>
<tr>
<td><code>rv64i</code></td>
<td>64 位基本整数指令集（<strong>必须的</strong>）</td>
</tr>
<tr>
<td><code>m</code></td>
<td>乘法和除法指令</td>
</tr>
<tr>
<td><code>a</code></td>
<td>原子指令</td>
</tr>
<tr>
<td><code>f</code></td>
<td>单精度浮点指令</td>
</tr>
<tr>
<td><code>d</code></td>
<td>双精度浮点指令</td>
</tr>
<tr>
<td><code>g</code></td>
<td>别名；一组运行**通用**操作系统所需的扩展集（包括 <code>imafd</code>）</td>
</tr>
<tr>
<td><code>c</code></td>
<td>压缩指令</td>
</tr>
</tbody>
</table>
<p>在 <code>rv64i</code> 这一字符串中，<code>rv</code> 表示 RISC-V，<code>64</code> 指的是 64 位 CPU 架构，而 <code>i</code> 指的是**强制性的**基本整数指令集扩展。 <code>rv64i</code> 之所以是一体的，因为即使 <code>i</code> 被认为是一种“扩展”，<strong>但它是必须的</strong>。</p>
<p>约定俗成的，扩展名称按上述特定顺序排列。因此，<code>rv64g</code> 展开为 <code>rv64imafd</code>，而不是 <code>rv64adfim</code>。</p>
<blockquote>
<p>💡 还有其他一些像 Zicsr 和 Zifencei 这样的扩展，它们位于 <code>d</code> 和 <code>g</code> 扩展之间，但我故意不列出，以避免令你感到害怕。</p>
<p>因此，严格说来，（在写这篇文章的时候）<code>rv64g</code> 实际上是 <code>rv64imafdZicsrZifencei</code>。<strong>恶魔般的笑声</strong></p>
</blockquote>
<h3 id="powerpc">PowerPC<a class="headerlink" href="#powerpc" title="Permanent link">&para;</a></h3>
<p>PowerPC 曾是苹果、IBM 以及，摩托罗拉早期合作时代的一种流行 CPU 架构。在苹果转向英特尔的 x86 架构之前，它一直被应用于苹果的全部消费品产品线。</p>
<p>最初，PowerPC 采取的是大端字节序的内存排序。后来随着 64 位架构的引入，增加了使用小端字节排序的选项。这么做的目的是为了与英特尔的内存排序保持兼容（以防止软件错误），因为英特尔自始至终都一直采用的是小端字节序。有关字节序的更多内容，我可以唠叨很久，不过你可以通过阅读 <a href="https://developer.mozilla.org/en-US/docs/Glossary/Endianness">这篇 Mozilla 的文档</a> 来了解更多。</p>
<p>由于字节序在此也起到了一定的作用，PowerPC 共有三种架构：</p>
<ul>
<li><code>powerpc</code>：表示 32 位的 PowerPC 架构。</li>
<li><code>ppc64</code>：表示拥有**大端字节序内存排序**的 64 位 PowerPC 架构。</li>
<li><code>ppc64le</code>：表示拥有**小端字节序内存排序**的 64 位 PowerPC 架构。</li>
</ul>
<p>目前，<strong><code>ppc64le</code> 是被广泛使用的架构</strong>。</p>
<h3 id="_2">结论<a class="headerlink" href="#_2" title="Permanent link">&para;</a></h3>
<p>市面上有各种各样的 CPU 架构。对于每一种架构，都有 32 位和 64 位的子集。在现有的 CPU 中，我们可以找到 x86、ARM、RISC-V 和 PowerPC 等架构。</p>
<p>其中，x86 是最广泛和易于获取的 CPU 架构，因为英特尔和 AMD 都采取了这种架构。此外，ARM 提供的产品几乎在手机和易于获取的单板计算机中被独占使用。</p>
<p>RISC-V 正在努力使硬件更广泛地被使用。我就有一款带有 RISC-V CPU 的单板计算机。 ;)</p>
<p>而 PowerPC 主要用于服务器，至少当前如此。</p>
<p><em>（题图：MJ/634ac7ea-b344-443a-b041-3bb3b31a956f）</em></p>
<hr />
<p>via: <a href="https://itsfoss.com/arm-aarch64-x86_64/">https://itsfoss.com/arm-aarch64-x86_64/</a></p>
<p>作者：<a href="https://itsfoss.com/author/pratham/">Pratham Patel</a>
选题：<a href="https://github.com/lujun9972">lujun9972</a>
译者：<a href="https://linux.cn/lctt/ChatGPT">ChatGPT</a>
校对：<a href="https://github.com/wxy">wxy</a></p>
<p>本文由 <a href="https://github.com/LCTT/TranslateProject">LCTT</a> 原创编译，<a href="https://linux.cn/">Linux中国</a> 荣誉推出</p>
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